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SPICE Simulations

The following sample SPICE Simulations are included in this website with source code and waveforms.

1. AC & DC Analysis                      

Click above link to see examples on how to simulate and plot a hysteresis curve using (slow) transient or DC Analysis,  and also how to measure a buffer's input/output capacitance using AC analysis in HSPICE.

2. IBIS Modeling

Click above link for IBIS modeling done on an ASIC design.

3. Parasitic Extraction & UNIX Scripts

Click above link for method using Cadence tools to extract a SPICE netlist with parasitics from layout to set up a critical path simulation.  For post-processing of SPICE output, a sample UNIX script is shown which extracts information from HSPICE (or Nanosim) output, and generates a formatted table of the desired timing arcs.

4. Signal Integrity / Noise Analysis

Click above link for noise simulations done using HSPICE for SSTL buffers.

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